1. Field of the Invention
This invention relates to electronic circuits, and more particularly, driver circuits in digital systems.
2. Description of the Related Art
The signaling conventions used in a digital system may to a large extent determine its reliability, speed, and power consumption. Careful design of signaling conventions is particularly important to ensure data integrity in high-speed digital systems.
One signaling technique that has been developed to ensure data integrity in high-speed digital systems is known as equalization (and may be alternately referred to as pre-emphasis or de-emphasis). Using the technique of pre-emphasis, different drive strengths of signals for a given logic level may be used during certain transitions. FIGS. 1A and 1B illustrate the difference between a traditional signaling convention and one using the technique of equalization. FIG. 1A is a timing diagram illustrating transitions between logic high and logic low voltage levels. The logic high and logic low voltage levels remain substantially the same throughout. The voltage level after a logic level transition (either high-to-low or low-to-high) is substantially the same as for a subsequent cycle where no transition occurred.
In contrast, FIG. 1B is a timing diagram illustrating signal transmissions in which the technique of equalization is used. In this particular example, the voltage levels of a logic high signal or a logic low signal are greater in magnitude on a cycle immediately following a transition. On those cycles subsequent to a transition where no further transition occurs, the voltage for that particular logic level is less in magnitude. Thus, for this particular example, there are effectively two voltage levels for each of logic high and logic low states: the emphasized level that signals are driven to on the low-to-high and high-to-low transitions, and the non-emphasized levels (which may also be referred to as a de-emphasized level) that signals are driven to when no logic level transition occurs from the previous cycle. This technique may be particularly useful for combating negative effects such as high frequency dependent loss which manifests itself as data dependent jitter or intersymbol interference (ISI).
Another important factor in designing a signaling convention is the design of the driver circuits which transmit digital signals. In particular, designing a driver circuit with a controlled, pre-determined output impedance is important to counter negative transmission line effects (e.g., reflections) that may otherwise occur if the output impedance is not controlled. Driver circuits designed for voltage-mode signaling typically have a very low output impedance, while driver circuits designed for current-mode signaling typically have a very high output impedance. Source terminated signaling requires that the output impedance of a driver circuit be matched to a transmission line to which it is coupled. Current mode driver circuits in parallel with a terminating resistor are underterminated. Current mode driver circuits are currently preferred by many designers, since they do not require the accurate voltage references required by voltage mode drivers. However, power consumption by current mode driver circuits may be significantly greater than that of voltage mode driver circuits, since a current mode driver circuit must source a greater amount of current into the shunt terminating resistor as well as the load to allow for a given logic voltage swing in comparison to a voltage mode driver circuit.
As noted above, voltage-mode driver circuits typically have low output impedance, and this impedance must be carefully matched to the transmission line coupled to the driver circuit. The necessity for accurate impedance matching between a driver circuit and a transmission line may make it difficult to design a voltage mode driver circuit configured to implement the technique of equalization, since output impedance must be controlled and matched for both emphasized and non-emphasized signal transmissions.